Lattice iCE40 Ultra (iCE5LP) Development System

This board provides a basic development system for the Lattice iCE40 Ultra (iCE5LP) FPGA. It is powered via a USB interface and includes 3.3V and 1.2V regulators. A 50MHz crystal oscillator is provided for accurate timing when the internal oscillator is insufficient. A RGB LED is connected to the on-chip RGB driver. All I/O is available via 0.1" headers, with a selectable bank voltage. The PCB has been shared at OSH Park.

Download schematic or RGB LED example.

Last update: 17 Sep 2017
© Steven J. Merrifield